| From: | "Devulapalli, Raghuveer" <raghuveer(dot)devulapalli(at)intel(dot)com> |
|---|---|
| To: | John Naylor <johncnaylorls(at)gmail(dot)com> |
| Cc: | Dmitry Dolgov <9erthalion6(at)gmail(dot)com>, Nathan Bossart <nathandbossart(at)gmail(dot)com>, Xiang Gao <Xiang(dot)Gao(at)arm(dot)com>, Michael Paquier <michael(at)paquier(dot)xyz>, "pgsql-hackers(at)lists(dot)postgresql(dot)org" <pgsql-hackers(at)lists(dot)postgresql(dot)org> |
| Subject: | RE: CRC32C Parallel Computation Optimization on ARM |
| Date: | 2025-03-12 17:49:50 |
| Message-ID: | PH8PR11MB8286A69F2573CBC2B02A28ABFBD02@PH8PR11MB8286.namprd11.prod.outlook.com |
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| Lists: | pgsql-hackers |
> > Intel has contributed SSE4.2 CRC32C [1] and AVX-512 CRC32C [2] based on
> similar techniques to postgres.
>
> ...this is a restatement of facts we already know. I'm guessing the intended
> takeaway is "since Intel submitted an implementation to us based on paper A,
> then we are free to separately also use a technique from paper B (which cites
> patents)".
Yes.
> The original proposal that started this thread is below, and I'd like to give that
> author credit for initiating that work
Yup, that should be fine.
Raghuveer
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