Re: Latches with weak memory ordering (Re: max_wal_senders must die)

From: Aidan Van Dyk <aidan(at)highrise(dot)ca>
To: Robert Haas <robertmhaas(at)gmail(dot)com>
Cc: Andres Freund <andres(at)anarazel(dot)de>, pgsql-hackers(at)postgresql(dot)org, Tom Lane <tgl(at)sss(dot)pgh(dot)pa(dot)us>, Heikki Linnakangas <heikki(dot)linnakangas(at)enterprisedb(dot)com>, Bruce Momjian <bruce(at)momjian(dot)us>, Josh Berkus <josh(at)agliodbs(dot)com>
Subject: Re: Latches with weak memory ordering (Re: max_wal_senders must die)
Date: 2010-11-19 14:27:51
Message-ID: AANLkTikk=HJSGkHFEx7dom=beTki9PkXokGA3BD5d3GF@mail.gmail.com
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On Fri, Nov 19, 2010 at 9:16 AM, Robert Haas <robertmhaas(at)gmail(dot)com> wrote:
> On Fri, Nov 19, 2010 at 3:07 AM, Andres Freund <andres(at)anarazel(dot)de> wrote:
>> So the complicated case seems to be !defined(HAS_TEST_AND_SET) which uses
>> spinlocks for that purpose - no idea where that is true these days.
>
> Me neither, which is exactly the problem.  Under Tom's proposal, any
> architecture we don't explicitly provide for, breaks.

Just a small point of clarification - you need to have both that
unknown archtecture, and that architecture has to have postgres
process running simultaneously on difference CPUs with different
caches that are incoherent to have those problems.

a.

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