From: | Alexander Korotkov <aekorotkov(at)gmail(dot)com> |
---|---|
To: | Tom Lane <tgl(at)sss(dot)pgh(dot)pa(dot)us> |
Cc: | Heikki Linnakangas <hlinnaka(at)iki(dot)fi>, Krunal Bauskar <krunalbauskar(at)gmail(dot)com>, pgsql-hackers <pgsql-hackers(at)postgresql(dot)org> |
Subject: | Re: Improving spin-lock implementation on ARM. |
Date: | 2020-11-27 07:27:08 |
Message-ID: | CAPpHfdsYnNWZRHLCmbgEtazCJCM8GXR=-YNpV6VabyVU731XjA@mail.gmail.com |
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Lists: | pgsql-hackers |
On Fri, Nov 27, 2020 at 2:20 AM Tom Lane <tgl(at)sss(dot)pgh(dot)pa(dot)us> wrote:
> Alexander Korotkov <aekorotkov(at)gmail(dot)com> writes:
> > On Thu, Nov 26, 2020 at 1:32 PM Heikki Linnakangas <hlinnaka(at)iki(dot)fi> wrote:
> >> Is there some official ARM documentation, like a programmer's reference
> >> manual or something like that, that would show a reference
> >> implementation of a spinlock on ARM? It would be good to refer to an
> >> authoritative source on this.
>
> > I've compared assembly output of gcc implementations of CAS and TAS.
>
> FWIW, I see quite different assembly using Apple's clang on their M1
> processor. What I get for SpinLockAcquire on HEAD is (lock pointer
> initially in x0):
Yep, arm v8.1 implements single-instruction atomic operations swpal
and casa, which much more look like x86 atomic instructions rather
than loops of ldxr/stlxr.
So, all the reasoning upthread shouldn't work here, but the advantage
is much more huge.
------
Regards,
Alexander Korotkov
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