Re: Optimize Arm64 crc32c implementation in Postgresql

From: Thomas Munro <thomas(dot)munro(at)enterprisedb(dot)com>
To: Heikki Linnakangas <hlinnaka(at)iki(dot)fi>
Cc: Tom Lane <tgl(at)sss(dot)pgh(dot)pa(dot)us>, Andres Freund <andres(at)anarazel(dot)de>, Yuqi Gu <Yuqi(dot)Gu(at)arm(dot)com>, "pgsql-hackers(at)postgresql(dot)org" <pgsql-hackers(at)postgresql(dot)org>
Subject: Re: Optimize Arm64 crc32c implementation in Postgresql
Date: 2018-05-02 11:18:28
Message-ID: CAEepm=0wF0_E++FYm38vtynbuyOamQ-1KjucV9r43MbHHaBsHA@mail.gmail.com
Views: Raw Message | Whole Thread | Download mbox | Resend email
Thread:
Lists: pgsql-hackers

On Thu, Apr 5, 2018 at 12:00 AM, Thomas Munro
<thomas(dot)munro(at)enterprisedb(dot)com> wrote:
> ... trying to figure out how to detect the instruction portably using SIGILL ...

Ahh, OpenSSL's armcap.c shows how to do this. You need to
siglongjmp() out of there. Here's a patch that does it that way.
Isn't this better?

I tested this on a Linux ARM system that has the instruction, and I
put a kill(getpid(), SIGILL) in there to test the negative case
because I don't have access to an ARM system without the instruction.
I don't have a FreeBSD/ARM system to test on either but I checked that
the flow control technique works fine on FreeBSD on another
architecture when it hits an instruction it doesn't support.

--
Thomas Munro
http://www.enterprisedb.com

Attachment Content-Type Size
0001-Use-a-portable-way-to-detect-ARMv8-CRC32-hardware.patch application/octet-stream 5.6 KB

In response to

Responses

Browse pgsql-hackers by date

  From Date Subject
Next Message Dmitry Dolgov 2018-05-02 12:02:00 Re: FPW stats?
Previous Message Michael Paquier 2018-05-02 11:10:58 Re: FPW stats?