Re: [PATCH] Native spinlock support on RISC-V

On Wed, Sep 1, 2021 at 9:22 PM Christoph Berg <myon(at)debian(dot)org> wrote:
> Re: Tom Lane
> > I did not like confusing the RISC-V case with the ARM case: duplicating
> > the code block seems better, in case there's ever reason to add
> > arch-specific stuff like SPIN_DELAY. So I split it off to its own
> > code block and pushed it.
>
> Fwiw I can report success on Debian's riscv port with that commit
> cherry-picked onto 13.4:
>
> https://buildd.debian.org/status/fetch.php?pkg=postgresql-13&arch=riscv64&ver=13.4-3&stamp=1630411643&raw=0

A couple of things I noticed on this architecture:

1. Even though we're using generic built-ins for atomics, I guess we
could still use a src/include/port/atomics/arch-riscv.h file so we
have a place to define PG_HAVE_8BYTE_SINGLE_COPY_ATOMICITY when
building for 64 bit. We'd need to find the chapter-and-verse to
justify that, of course, which I can try to do; if someone more
familiar with the ISA/spec/manual can point to it I'm all ears.

2. When configured with all options on FreeBSD 13, everything looks
good so far except LLVM JIT, which fails with various "Cannot select"
errors. Clang works fine for compiling PostgreSQL itself. Tested
with LLVM 12 (LLVM has supported RISCV since 9). Example:

+FATAL: fatal llvm error: Cannot select: 0x4f772068: ch = brcond
0x4f770f70, 0x4f772208, BasicBlock:ch< 0x4f76d600>
+ 0x4f772208: i64 = setcc 0x4f7723a8, Constant:i64<0>, setlt:ch
+ 0x4f7723a8: i64,ch = load<(load 4 from `i32* inttoptr (i64
1260491408 to i32*)`, align 16), sext from i32> 0x4fdee058,
Constant:i64<1260491408>, undef:i64
+ 0x4f770a90: i64 = Constant<1260491408>
+ 0x4f7703a8: i64 = undef
+ 0x4f7701a0: i64 = Constant<0>
+In function: evalexpr_0_0