From: | Andres Freund <andres(at)anarazel(dot)de> |
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To: | Tom Lane <tgl(at)sss(dot)pgh(dot)pa(dot)us> |
Cc: | Robert Haas <robertmhaas(at)gmail(dot)com>, Dilip Kumar <dilipbalaut(at)gmail(dot)com>, Alexander Korotkov <a(dot)korotkov(at)postgrespro(dot)ru>, Merlin Moncure <mmoncure(at)gmail(dot)com>, Michael Paquier <michael(dot)paquier(at)gmail(dot)com>, Amit Kapila <amit(dot)kapila16(at)gmail(dot)com>, YUriy Zhuravlev <u(dot)zhuravlev(at)postgrespro(dot)ru>, pgsql-hackers <pgsql-hackers(at)postgresql(dot)org> |
Subject: | Re: Move PinBuffer and UnpinBuffer to atomics |
Date: | 2016-03-29 17:42:39 |
Message-ID: | 20160329174239.GE25907@awork2.anarazel.de |
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Lists: | pgsql-hackers |
On 2016-03-29 13:24:40 -0400, Tom Lane wrote:
> Andres Freund <andres(at)anarazel(dot)de> writes:
> > Dilip, could you test performance of reducing ppc's spinlock to 1 byte?
> > Cross-compiling suggest that doing so "just works". I.e. replace the
> > #if defined(__ppc__) typedef from an int to a char.
>
> AFAICS, lwarx/stwcx are specifically *word* wide.
Ah, x86 gcc is just too convenient, with it automatically adjusting
instruction types :(
There's actually lbarx/stbcx - but it's not present in all ISAs. So I
guess it's clear where to go.
Andres Freund
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