Re: Misaligned BufferDescriptors causing major performance problems on AMD

On 2015-01-26 21:13:31 -0500, Robert Haas wrote:
> On Mon, Jan 26, 2015 at 9:08 PM, Robert Haas <robertmhaas(at)gmail(dot)com> wrote:
> >> Contrary opinions? Robert?
> >
> > I'm totally OK with further aligning just that one allocation.
>
> Of course, now that I think about it, aligning it probably works
> mostly because the size is almost exactly one cache line.

Not just almost - it's precisely 64 byte on x86-64 linux. And I think
it'll also be that on other 64bit platforms. The only architecture
dependant thing in there is the spinlock and that already can be between
1 and 4 bytes without changing the size of the struct.

> If it were any bigger or smaller, aligning it more wouldn't help.

Yea.

> So maybe we should also do something like what LWLocks do, and make a
> union between the actual structure and an appropriate array of padding
> bytes - say either 64 or 128 of them.

Hm. That's a bit bigger patch. I'm inclined to just let it slide for the
moment. I still have plans to downsize some of sbufdesc's content (move
the io lock out) and move the content lwlock inline. Then we're not
going to have much choice but do this...

Greetings,

Andres Freund

--
Andres Freund http://www.2ndQuadrant.com/
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