From: | Martijn van Oosterhout <kleptog(at)svana(dot)org> |
---|---|
To: | Josh Berkus <josh(at)agliodbs(dot)com> |
Cc: | pgsql-hackers(at)postgresql(dot)org, Tom Lane <tgl(at)sss(dot)pgh(dot)pa(dot)us>, Mark Mielke <mark(at)mark(dot)mielke(dot)cc>, Magne Mæhre <Magne(dot)Mahre(at)sun(dot)com> |
Subject: | Re: Spinlock backoff algorithm |
Date: | 2007-11-16 08:45:42 |
Message-ID: | 20071116084542.GB31271@svana.org |
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Lists: | pgsql-hackers |
On Wed, Nov 14, 2007 at 06:57:18PM -0800, Josh Berkus wrote:
> The question is, for our most common platforms (like AMD and Intel) is the FPU
> notably slower/more contended than integer division? I'd the impression that
> it was, but my knowledge of chip architectures is liable to be out of date.
>
> Can we have a hardware geek speak up?
I did some searching and the best figures I can find for integer
division is 15-40 cycles whereas for floating point the best I found was 5
cycles. The FP units on modern processer as very highly optimsed, but
the figures quoted are for pipelined division, which is not what we're
doing here.
http://www.behardware.com/art/imprimer/623/
I did find a thread about how integer division on the Itanium was
implemented by copying the integers to the FP registers, doing the
division and rounding there and copying back. So at least there it's
not true.
http://gcc.gnu.org/ml/gcc-patches/2005-12/msg01518.html
Hope this helps,
--
Martijn van Oosterhout <kleptog(at)svana(dot)org> http://svana.org/kleptog/
> Those who make peaceful revolution impossible will make violent revolution inevitable.
> -- John F Kennedy
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