From: | Bruce Momjian <pgman(at)candle(dot)pha(dot)pa(dot)us> |
---|---|
To: | Pierre Girard <pierre(dot)girard(at)gerad(dot)ca> |
Cc: | Tom Lane <tgl(at)sss(dot)pgh(dot)pa(dot)us>, PostgreSQL-patches <pgsql-patches(at)postgresql(dot)org> |
Subject: | Re: [BUGS] Solaris cc compiler on amd: PostgreSQL does not have native |
Date: | 2005-12-17 21:07:52 |
Message-ID: | 200512172107.jBHL7qd19802@candle.pha.pa.us |
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Lists: | pgsql-bugs pgsql-hackers pgsql-patches |
Pierre Girard wrote:
> Tom Lane wrote:
>
> >You'd need to do something about adapting src/backend/port/tas/solaris_i386.s
> >
> >It's possible that the assembly code would work as-is on amd, in which
> >case you'd just need a one-liner change in s_lock.h and maybe some
> >adjustment of the template file.
> >
> >
> It doesn't compile with the options to create amd code.
> cc -Xa -xtarget=opteron -xarch=amd64 -c solaris_i386.s
> Assembler: tas.s
> "solaris_i386.s", line 12 : Illegal mnemonic
> "solaris_i386.s", line 14 : Illegal mnemonic
> "solaris_i386.s", line 15 : Syntax error
> "solaris_i386.s", line 17 : Syntax error
> "solaris_i386.s", line 26 : Illegal mnemonic
> "solaris_i386.s", line 28 : Illegal mnemonic
> cc: assembler failed for solaris_i386.s
>
> The same file compiles without those options:
> cc -Xa -c solaris_i386.s
Interesting. Seems you have a setup that uses its own assembly source
file in port/tas/solaris_i386.s, rather than using inline C ASM. There
are files for both Sparc and i386 there, and are both used only for the
Sun compiler. Does the Sun compiler not support ASM inlining?
Looking at the error line, it is:
pushl %ebp /save prev base pointer
and then:
pushl %ebx /save prev bx
Looks like it is all documented here:
http://www.x86-64.org/documentation/assembly
Specifically:
Exceptions from this rule are instructions manipulating the stack (push,
pop, call, ret, enter and leave) which are implicitly 64-bit and their
32-bit counterparts are not available anymore, yet their 16-bit
counterparts are. So:
pushl %eax # Illegal instruction
pushq %rax # 1 byte instruction encoded as pushl %eax in 32 bits
pushq %r10 # 2 byte instruction encoded as pushl preceeded by REX.
Looking before that, the 64-bit registers are now prefixed with 'r'
instead of 'e', so what I did was to convert all the long/l assembler
instructions to quad/64-bit/q, and rename the registers to use 64-bit
versions. I also modified the function alignment from 4 to 8, patch
attached. Please give it a try and report back any error lines.
Seems Sun might be interested in geting this working. We don't have an
official Sun contact yet for this project.
--
Bruce Momjian | http://candle.pha.pa.us
pgman(at)candle(dot)pha(dot)pa(dot)us | (610) 359-1001
+ If your life is a hard drive, | 13 Roberts Road
+ Christ can be your backup. | Newtown Square, Pennsylvania 19073
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