Re: Escaping the ARC patent

From: Bruce Momjian <pgman(at)candle(dot)pha(dot)pa(dot)us>
To: Tom Lane <tgl(at)sss(dot)pgh(dot)pa(dot)us>
Cc: pgsql-hackers(at)postgresql(dot)org
Subject: Re: Escaping the ARC patent
Date: 2005-02-04 05:02:18
Message-ID: 200502040502.j1452Ig06289@candle.pha.pa.us
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Tom Lane wrote:
> Given the prior art, the critical word in this sentence is "adaptively";
> take that out and you have nothing that wasn't published long before.
> If we remove the adaptivity --- ie, just use a fixed division of list
> sizes --- we escape claim 1 and all the other claims that depend on it.
>
> The only other claim that isn't dependent on claim 1 or a restatement of
> it is
>
> 45. A method for adaptively managing pages in a memory, comprising:
> defining a cache memory; defining a cache directory; organizing the
> cache directory into fours disjoint lists of pages: list T1, list T2,
> list B1, and list B2; and wherein the cache memory contains pages that
> are members of any of the list T1 or the list T2.
>
> So if we use non-variable sizes of T1/T2 and don't use the four-way
> list structure to manage remembrance of pages-formerly-in-cache,
> we escape the patent. But we still have scan resistance, which is the
> main thing that ARC was going to buy us. Pages that are scanned only
> once don't get out of A1 and so aren't able to swamp out pages
> referenced multiple times.

So are you saying you are making T1, T2, B1, and B2 a fixed percentage
of the buffer cache rather than making them adjust over time?

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Bruce Momjian | http://candle.pha.pa.us
pgman(at)candle(dot)pha(dot)pa(dot)us | (610) 359-1001
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