Re: Wierd context-switching issue on Xeon

From: Bruce Momjian <pgman(at)candle(dot)pha(dot)pa(dot)us>
To: Tom Lane <tgl(at)sss(dot)pgh(dot)pa(dot)us>
Cc: pg(at)fastcrypt(dot)com, Robert Creager <Robert_Creager(at)LogicalChaos(dot)org>, Josh Berkus <josh(at)agliodbs(dot)com>, Dirk_Lutzebäck <lutzeb(at)aeccom(dot)com>, ohp(at)pyrenet(dot)fr, Joe Conway <mail(at)joeconway(dot)com>, "scott(dot)marlowe" <scott(dot)marlowe(at)ihs(dot)com>, pgsql-performance(at)postgresql(dot)org, Neil Conway <neilc(at)samurai(dot)com>
Subject: Re: Wierd context-switching issue on Xeon
Date: 2004-05-20 04:11:05
Message-ID: 200405200411.i4K4B5F03803@candle.pha.pa.us
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OK, added to TODO:

* Investigate SMP context switching issues

---------------------------------------------------------------------------

Tom Lane wrote:
> Bruce Momjian <pgman(at)candle(dot)pha(dot)pa(dot)us> writes:
> > Tom Lane wrote:
> >> ... The SMP issue seems to be not with whether there is
> >> instantaneous contention for the locked datastructure, but with the cost
> >> of making it possible for processor B to acquire a lock recently held by
> >> processor A.
>
> > I see. I don't even see a TODO in there. :-(
>
> Nothing more specific than "investigate SMP context switching issues",
> anyway. We are definitely in a research mode here, rather than an
> engineering mode.
>
> ObQuote: "Research is what I am doing when I don't know what I am
> doing." - attributed to Werner von Braun, but has anyone got a
> definitive reference?
>
> regards, tom lane
>

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